1. Field of the Invention
The present invention relates to a method for producing optically smooth surfaces on silicon wafers undergoing chemical etching.
2. Description of Related Art
Smooth etching of silicon using wet chemistry techniques is highly desirable for some integrated circuit applications and for manufacturing devices such as microstructures, microsensors, and electro-optic devices. Smooth etching is also advantageous to produce surfaces that will be bonded together, since stronger bonds are formed between flat silicon substrate surfaces having minimum roughness.
In micromachining, a potassium hydroxide (KOH) etchant is commonly used to etch silicon wafers anisotropically to create three-dimensional or multi-level features. This conventional KOH etching process typically produces rough surfaces. For example, the surface smoothness of manufactured prime grade wafers, typically 5-10 xc3x85 (RMS), rapidly deteriorates to 100-200 xc3x85 (RMS) after etching in potassium hydroxide (KOH) to a depth of only a few microns. Other conventional wafer thinning techniques use hydrofluoric acid (HF) and nitric acid (HNO3) solutions, which are vigorous, hard to control, and are isotropic etching processes that cannot make precise rectangular geometries.
An improved processing technique that improves the microscopic smoothness of semiconductor wafers undergoing wet chemical etching that is slower and thus easier to control, and is anisotropic in nature to permit fabrication of precise rectangular features, would be advantageous. The present invention provides a process with these features.
This invention is a process for producing optically smooth surfaces on silicon wafers undergoing anisotropic etching, such as potassium hydroxide (KOH) etching. The process includes a pre-treatment surface cleaning step before etching, in which the surface is wet with an organic rinse, such as acetone or methanol. A post-etching rinse is used to stop etching instantly, which prevents uneven etching and rough surfaces. The present process can be used to etch silicon surfaces to a depth of 200 xcexcm or more, while the finished surfaces have a surface roughness of only 15-50 xc3x85 (RMS), as compared to the 100-200 xc3x85 (RMS) usually achieved with general wet chemical etching.
This new processing technique has numerous applications besides wafer thinning. It can be used to produce a precision gap between two wafers. Because new features are possible on the smoothly etched surfaces, this new process is useful in fabricating three-dimensional or multi-level devices, such as sensors and other microstructures requiring mirror-like etched surfaces. The process can also be used to make precise wafer alignment guides for wafer bonding. The technique is excellent for size control when etched-through features have deviated sizes due to variations in wafer thickness.